3D Co-Design Challenges (concluded)

By Francoise von Trapp on Jul. 16, 2010 Site: 3D InCites (Public) Forum: SEMICON West 2010 3D Wrap-up Forum - # of views: 2308

 

Thanks for your participation in this discussion, Samta. I was hoping for a little more input from the design community, especially those who had presented at the event, but it looks like everyone's gone on vacation. For now, I'm concluding this discussion thread, and hopefully we'll return to this topic as things progress further.

 

Good morning all - as I was unable to attend the session on 3D Co-Design challenges, I'm hoping to gain some insight from this discussion. There seem to be two schools of thought on the approach to developing EDA tools for 3D design - some who say that existing 2D tools can be easily adapted for 3D, and others who say a whole new approach is needed for developing 3D EDA tools. Can someone please offer their insight here?

 

The TSV approach, as most of us agree, is evolutionary – which is why we see that extending the current EDA systems to be 3D aware can solve Design, Implementation, Analysis, Co-design and Verification side of issues well. This extension of the current EDA tools to understand the new dimension and complexity that 3D with TSVs/Silicon Interposers brings is an extensive task in itself. If we really need to mobilize the 3D community with something substantial, leveraging from what we have and know best about, is the fastest way to make progress. From the work we have been doing with our partners we have established that enhancing our complete EDA system to make then 3D aware with TSVs works really well. There are areas that need new developments for sure and we are focusing on those too. So I think it is mixed bag. What is important in my mind is : a convergent methodology that can help solve the 3D design challenges easily. It is time for ecosystem players to play together for the better if we really want to get this technology into hands of many. The forum stressed on collaboration at this time from all ends.

 

When we talk about 3D, most people's minds now goes directly to TSV interconnects. However, 3D configurations like package-on-package, wire bond stacks, flip chip, vertical interconnect process, have existed for some time. I would imagine these configurations that also exploit the Z-direction were designed using existing tools. Can the EDA community leverage some of the same technology there to the TSVs? 

Does this evolutionry approach apply when you're talking about 3D silicon as oposed to 3D packaging?